Description
TLC3544IPW Texas Instruments - Yeehing Electronics
14-bit, 5V, 200KSPS, 4-Channel Unipolar ADC
Pricing (USD)
Quantity | Unit Price |
1 — 99 | 17.324 |
100 — 249 | 15.132 |
250 — 999 | 11.667 |
1,000 + | 7.31 |
The above prices are for reference only.
Specifications
Manufacturer | Texas Instruments |
Product Category | Analog to Digital Converters - ADC |
RoHS | Y |
Series | TLC3544 |
Mounting Style | SMD/SMT |
Package / Case | TSSOP-20 |
Resolution | 14 bit |
Number of Channels | 4 Channel |
Sampling Rate | 200 kS/s |
Input Type | Pseudo-Differential |
Interface Type | 3-Wire, SPI |
Architecture | SAR |
Reference Type | External, Internal |
Analog Supply Voltage | 4.5 V to 5.5 V |
Digital Supply Voltage | 2.7 V to 5.5 V |
SNR - Signal to Noise Ratio | 81 dB |
Minimum Operating Temperature | - 40 C |
Maximum Operating Temperature | + 85 C |
Packaging | Tube |
Features | Oscillator |
Height | 1 mm |
Length | 6.5 mm |
Number of Converters | 1 Converter |
Power Consumption | 20 mW |
Width | 4.4 mm |
Brand | Texas Instruments |
Development Kit | TLC3544EVM |
DNL - Differential Nonlinearity | +/- 1 LSB |
INL - Integral Nonlinearity | +/- 1 LSB |
Operating Supply Voltage | 2.7 V to 5.5 V, 4.75 V to 5.5 V |
Product Type | ADCs - Analog to Digital Converters |
SINAD - Signal to Noise and Distortion Ratio | 80.8 dB |
Factory Pack Quantity | 70 |
Subcategory | Data Converter ICs |
Unit Weight | 0.002758 oz |
For more information, please refer to datasheet
Documents
TLC3544IPW Datasheet |
More Information
The TLC3544 and TLC3548 are a family of 14-bit resolution high-performance, low-power, CMOS analog-to-digital converters (ADC). All devices operate from a single 5-V analog power supply and 3-V to 5-V digital supply. The serial interface consists of four digital inputs [chip select (CS), frame sync (FS), serial input-output clock (SCLK), serial data input (SDI)], and a 3-state serial data output (SDO). CS (works as SS, slave select), SDI, SDO, and SCLK form an SPI interface. FS, SDI, SDO, and SCLK form a DSP interface. The frame sync signal (FS) indicates the start of a serial data frame being transferred. When multiple converters connect to one serial port of a DSP, CS works as the chip select to allow the host DSP to access the individual converter. CS can be tied to ground if only one converter is used. FS must be tied to DVDD if it is not used (such as in an SPI interface). When SDI is tied to DVDD, the device is set in hardware default mode after power-on, and no software configuration is required. In the simplest case, only three wires (SDO, SCLK, and CS or FS) are needed to interface with the host.