Description
ADC08B200QCIVS/NOPB Texas Instruments - Yeehing Electronics
8-Bit, 200-MSPS Analog-to-Digital Converter (ADC) - Qualified for Automotive Applications
Pricing (USD)
| Quantity | Unit Price |
| 1 — 99 | 29.324 |
| 100 — 249 | 26.066 |
| 250 — 999 | 21.428 |
| 1,000 + | 13.42 |
The above prices are for reference only.
Specifications
| Manufacturer | Texas Instruments |
| Product Category | Analog to Digital Converters - ADC |
| RoHS | Y |
| Series | ADC08B200-Q1 |
| Mounting Style | SMD/SMT |
| Package / Case | TQFP-48 |
| Resolution | 8 bit |
| Number of Channels | 1 Channel |
| Sampling Rate | 200 MS/s |
| Input Type | Single-Ended |
| Interface Type | Parallel |
| Architecture | Pipeline |
| Reference Type | External |
| Analog Supply Voltage | 3.3 V |
| Digital Supply Voltage | 2.7 V to 3.6 V |
| SNR - Signal to Noise Ratio | 47 dB |
| Minimum Operating Temperature | - 40 C |
| Maximum Operating Temperature | + 105 C |
| Packaging | Tray |
| Features | Low Power |
| Height | 1 mm |
| Input Voltage | 1.6 V |
| Length | 7 mm |
| Number of Converters | 1 Converter |
| Power Consumption | 543 mW |
| Type | S/H ADC |
| Width | 7 mm |
| Brand | Texas Instruments |
| DNL - Differential Nonlinearity | +/- 0.4 LSB |
| ENOB - Effective Number of Bits | 7.2 Bit |
| Gain Error | - 39 mV |
| INL - Integral Nonlinearity | +/- 1.3 LSB |
| Moisture Sensitive | Yes |
| Number of ADC Inputs | 1 Input |
| Operating Supply Voltage | 3.3 V |
| Product Type | ADCs - Analog to Digital Converters |
| Sample and Hold | Yes |
| SFDR - Spurious Free Dynamic Range | 56 dB |
| SINAD - Signal to Noise and Distortion Ratio | 45 dB |
| Factory Pack Quantity | 250 |
| Subcategory | Data Converter ICs |
| Unit Weight | 0.004748 oz |
For more information, please refer to datasheet
Documents
| ADC08B200QCIVS/NOPB Datasheet |
More Information
The ADC08B200 is a high speed analog-to-digital converter (ADC) with an integrated capture buffer. The 8-bit, 200 MSPS A/D core is based upon the proven ADC08200 with integrated track-and-hold and is optimized for low power consumption. This device contains a selectable size capture buffer of up to 1,024 bytes that allows fast capture of an input signal with a slower readout rate. An on-chip clock PLL circuit provides the option of on-chip clock rate multiplication to provide the high speed sampling clock.
