Description
ADC08D1020CIYB/NOPB Texas Instruments - Yeehing Electronics
8-Bit, Dual 1.0 GSPS or Single 2.0 GSPS, Analog-to-Digital Converter (ADC)
Pricing (USD)
| Quantity | Unit Price |
| 1 — 99 | 404.934 |
| 100 — 249 | 372.796 |
| 250 — 999 | 321.376 |
| 1,000 + | 283.45 |
The above prices are for reference only.
Specifications
| Manufacturer | Maxim Integrated |
| Product Category | Analog to Digital Converters - ADC |
| RoHS | Y |
| Series | MAX11905 |
| Mounting Style | SMD/SMT |
| Package / Case | TQFN-20 EP |
| Resolution | 20 bit |
| Number of Channels | 1 Channel |
| Sampling Rate | 1.6 MS/s |
| Input Type | Differential |
| Interface Type | SPI |
| Architecture | SAR |
| Reference Type | External |
| SNR - Signal to Noise Ratio | 98.3 dB |
| Minimum Operating Temperature | - 40 C |
| Maximum Operating Temperature | + 85 C |
| Packaging | Tube |
| Number of Converters | 1 Converter |
| Type | ADC |
| Brand | Maxim Integrated |
| Operating Supply Voltage | 1.8 V, 3.3 V, 1.5 V to 3.6 V |
| Pd - Power Dissipation | 2424.2 mW |
| Product Type | ADCs - Analog to Digital Converters |
| Reference Voltage | 2.5 V to 3.6 V |
| Factory Pack Quantity | 75 |
| Subcategory | Data Converter ICs |
For more information, please refer to datasheet
Documents
| ADC08D1020CIYB/NOPB Datasheet |
More Information
The ADC08D1020 is a dual, low power, high performance, CMOS analog-to-digital converter that builds upon the ADC08D1000 platform. The ADC08D1020 digitizes signals to 8 bits of resolution at sample rates up to 1.3 GSPS. It has expanded features compared to the ADC08D1000, which include a test pattern output for system debug, a clock phase adjust, and selectable output demultiplexer modes. Consuming a typical 1.6 Watts in non-demultiplex mode at 1 GSPS from a single 1.9 Volt supply, this device is ensured to have no missing codes over the full operating temperature range. The unique folding and interpolating architecture, the fully differential comparator design, the innovative design of the internal sample-and-hold amplifier and the calibration schemes enable a very flat response of all dynamic parameters beyond Nyquist, producing a high 7.4 Effective Number of Bits (ENOB) with a 498 MHz input signal and a 1 GHz sample rate while providing a 10−18 Code Error Rate (C.E.R.) Output formatting is offset binary and the Low Voltage Differential Signaling (LVDS) digital outputs are compatible with IEEE 1596.3-1996, with the exception of an adjustable common mode voltage between 0.8V and 1.2V.
