ADC08D1520CIYB/NOPB Texas Instruments - Yeehing Electronics

8-Bit, Dual 1.5-GSPS or Single 3.0-GSPS Analog-to-Digital Converter (ADC)

Pricing (USD)

Quantity	Unit Price
1 — 99	587.813
100 — 249	541.161
250 — 999	466.518
1,000 +	411.47

The above prices are for reference only.

Specifications

Manufacturer	Texas Instruments
Product Category	Analog to Digital Converters - ADC
RoHS	Y
Series	ADS62P45
Mounting Style	SMD/SMT
Package / Case	VQFN-64
Resolution	14 bit
Number of Channels	2 Channel
Sampling Rate	125 MS/s
Input Type	Differential
Interface Type	Parallel
Architecture	Pipeline
Reference Type	External, Internal
Analog Supply Voltage	3.3 V
Digital Supply Voltage	3 V to 3.6 V
SNR - Signal to Noise Ratio	74.2 dB
Minimum Operating Temperature	- 40 C
Maximum Operating Temperature	+ 85 C
Packaging	Reel
Features	High Performance
Height	0.88 mm
Length	9 mm
Number of Converters	2 Converter
Output Type	LVDS
Power Consumption	792 mW
Width	9 mm
Brand	Texas Instruments
Development Kit	ADS62P45EVM
DNL - Differential Nonlinearity	+/- 0.8 LSB
ENOB - Effective Number of Bits	11.8 Bit
INL - Integral Nonlinearity	+/- 5 LSB
Moisture Sensitive	Yes
Operating Supply Voltage	3.3 V
Pd - Power Dissipation	908 mW
Product Type	ADCs - Analog to Digital Converters
SFDR - Spurious Free Dynamic Range	85 dB
SINAD - Signal to Noise and Distortion Ratio	73.2 dB
Factory Pack Quantity	250
Subcategory	Data Converter ICs
Unit Weight	0.007383 oz

For more information, please refer to datasheet

Documents

ADC08D1520CIYB/NOPB Datasheet

More Information

The ADC08D1520 is a dual, low power, high performance CMOS analog-to-digital converter that builds upon the ADC08D1500 platform. The ADC08D1520 digitizes signals to 8 bits of resolution at sample rates up to 1.7 GSPS. It has expanded features compared to the ADC08D1500, which include a test pattern output for system debug, a clock phase adjust, and selectable output demultiplexer modes. Consuming a typical 1.6 Watts in Non-Demultiplex Mode at 1.0 GSPS from a single 1.9 Volt supply, this device is guaranteed to have no missing codes over the full operating temperature range. The unique folding and interpolating architecture, the fully differential comparator design, the innovative design of the internal sample-and-hold amplifier and the self-calibration scheme enable a very flat response of all dynamic parameters beyond Nyquist, producing a high 7.4 Effective Number of Bits (ENOB) with a 748 MHz input signal and a 1.5 GHz sample rate while providing a 10-18 Code Error Rate (C.E.R.) Output formatting is offset binary and the Low Voltage Differential Signaling (LVDS) digital outputs are compatible with IEEE 1596.3-1996, with the exception of an adjustable common mode voltage between 0.8V and 1.2V.