Description
ADC10065CIMT/NOPB Texas Instruments - Yeehing Electronics
10-Bit, 65-MSPS Analog-to-Digital Converter (ADC)
Pricing (USD)
| Quantity | Unit Price |
| 1 — 99 | 8.327 |
| 100 — 249 | 7.273 |
| 250 — 999 | 5.608 |
| 1,000 + | 3.51 |
The above prices are for reference only.
Specifications
| Manufacturer | Texas Instruments |
| Product Category | Analog to Digital Converters - ADC |
| RoHS | Y |
| Series | ADC10065 |
| Mounting Style | SMD/SMT |
| Package / Case | TSSOP-28 |
| Resolution | 10 bit |
| Number of Channels | 1 Channel |
| Sampling Rate | 65 MS/s |
| Input Type | Differential |
| Interface Type | Parallel |
| Architecture | Pipeline |
| Reference Type | External, Internal |
| Analog Supply Voltage | 2.7 V to 3.6 V |
| Digital Supply Voltage | 2.5 V to 3.6 V |
| SNR - Signal to Noise Ratio | 59.6 dB |
| Minimum Operating Temperature | - 40 C |
| Maximum Operating Temperature | + 85 C |
| Packaging | Tube |
| Features | Low Power |
| Height | 0.9 mm |
| Input Voltage | 1 V, 1.5 V, 2 V |
| Length | 9.7 mm |
| Number of Converters | 1 Converter |
| Power Consumption | 68.4 mW |
| Type | S/H ADC |
| Width | 4.4 mm |
| Brand | Texas Instruments |
| DNL - Differential Nonlinearity | +/- 0.3 LSB |
| ENOB - Effective Number of Bits | 9.6 Bit |
| Gain Error | - 1.5 % FSR to + 1.9 % FSR |
| INL - Integral Nonlinearity | - 1 LSB, + 1.1 LSB |
| Moisture Sensitive | Yes |
| Number of ADC Inputs | 1 Input |
| Operating Supply Voltage | 3 V |
| Pd - Power Dissipation | 68.4 mW |
| Product Type | ADCs - Analog to Digital Converters |
| Sample and Hold | Yes |
| SFDR - Spurious Free Dynamic Range | 80 dB |
| SINAD - Signal to Noise and Distortion Ratio | 59.4 dB |
| Factory Pack Quantity | 48 |
| Subcategory | Data Converter ICs |
| Unit Weight | 0.014215 oz |
For more information, please refer to datasheet
Documents
| ADC10065CIMT/NOPB Datasheet |
More Information
The ADC10065 is a monolithic CMOS analog-to-digital converter capable of converting analog input signals into 10-bit digital words at 65 Megasamples per second (MSPS). This converter uses a differential, pipeline architecture with digital error correction and an on-chip sample-and-hold circuit to provide a complete conversion solution, and to minimize power consumption, while providing excellent dynamic performance. A unique sample-and-hold stage yields a full-power bandwidth of 400 MHz. Operating on a single 3.0V power supply, this device consumes just 68.4 mW at 65 MSPS, including the reference current. The Standby feature reduces power consumption to just 14.1 mW.
