Description
ADC11C125CISQ/NOPB Texas Instruments - Yeehing Electronics
11-Bit, 125MSPS, 1.1GHz Input Bandwidth Analog-to-Digital Converter (ADC)
Pricing (USD)
| Quantity | Unit Price |
| 1 — 99 | 26.067 |
| 100 — 249 | 23.17 |
| 250 — 999 | 19.047 |
| 1,000 + | 11.93 |
The above prices are for reference only.
Specifications
| Manufacturer | Texas Instruments |
| Product Category | Analog to Digital Converters - ADC |
| RoHS | Y |
| Series | ADC11C125 |
| Mounting Style | SMD/SMT |
| Package / Case | WQFN-48 |
| Resolution | 11 bit |
| Number of Channels | 1 Channel |
| Sampling Rate | 125 MS/s |
| Input Type | Differential |
| Interface Type | Parallel |
| Architecture | Pipeline |
| Reference Type | External, Internal |
| Analog Supply Voltage | 3.3 V |
| Digital Supply Voltage | 1.6 V to 3.6 V |
| SNR - Signal to Noise Ratio | 65.7 dB |
| Minimum Operating Temperature | - 45 C |
| Maximum Operating Temperature | + 85 C |
| Packaging | Reel |
| Features | Low Power |
| Height | 0.8 mm |
| Input Voltage | +/- 1 V |
| Length | 7 mm |
| Number of Converters | 1 Converter |
| Power Consumption | 608 mW |
| Type | S/H ADC |
| Width | 7 mm |
| Brand | Texas Instruments |
| DNL - Differential Nonlinearity | +/- 0.2 LSB |
| ENOB - Effective Number of Bits | 10.5 Bit |
| Gain Error | - 3.7 % FSR to + 4 % FSR |
| INL - Integral Nonlinearity | 0.83 LSB |
| Moisture Sensitive | Yes |
| Number of ADC Inputs | 1 Input |
| Operating Supply Voltage | 3.3 V |
| Pd - Power Dissipation | 5.2 W |
| Product Type | ADCs - Analog to Digital Converters |
| Sample and Hold | Yes |
| SFDR - Spurious Free Dynamic Range | 88.2 dB |
| SINAD - Signal to Noise and Distortion Ratio | 65.5 dB |
| Factory Pack Quantity | 250 |
| Subcategory | Data Converter ICs |
For more information, please refer to datasheet
Documents
| ADC11C125CISQ/NOPB Datasheet |
More Information
The ADC11C125 is a high-performance CMOS analog-to-digital converter capable of converting analog input signals into 11-Bit digital words at rates up to 125 Mega Samples Per Second (MSPS). This converter uses a differential, pipelined architecture with digital error correction and an on-chip sample-and-hold circuit to minimize power consumption and the external component count, while providing excellent dynamic performance. A unique sample-and-hold stage yields a full-power bandwidth of 1.1 GHz. The ADC11C125 operates from dual +3.3V and +1.8V power supplies and consumes 608 mW of power at 125 MSPS.
