Description
ADC11DV200CISQX/NOPB Texas Instruments - Yeehing Electronics
Dual-Channel, 11-Bit, 200MSPS Analog-to-Digital Converter (ADC)
Pricing (USD)
Quantity | Unit Price |
1 — 99 | 90.411 |
100 — 249 | 87.692 |
250 — 999 | 73.008 |
1,000 + | 47.58 |
The above prices are for reference only.
Specifications
Manufacturer | Texas Instruments |
Product Category | Analog to Digital Converters - ADC |
RoHS | Y |
Series | ADC11DV200 |
Mounting Style | SMD/SMT |
Package / Case | WQFN-60 |
Resolution | 11 bit |
Number of Channels | 2 Channel |
Sampling Rate | 200 MS/s |
Input Type | Differential |
Interface Type | Parallel |
Architecture | Pipeline |
Reference Type | External, Internal |
Analog Supply Voltage | 1.8 V |
Digital Supply Voltage | 1.8 V |
SNR - Signal to Noise Ratio | 63.8 dB |
Minimum Operating Temperature | - 40 C |
Maximum Operating Temperature | + 85 C |
Packaging | Reel |
Features | Low Power |
Height | 0.8 mm |
Input Voltage | 1.5 V |
Length | 9 mm |
Number of Converters | 2 Converter |
Output Type | LVDS |
Power Consumption | 473 mW |
Type | S/H ADC |
Width | 9 mm |
Brand | Texas Instruments |
Development Kit | ADC11DV200EB/NOPB |
DNL - Differential Nonlinearity | +/- 0.32 LSB |
ENOB - Effective Number of Bits | 10.1 Bit |
Gain Error | 3 % FSR |
INL - Integral Nonlinearity | 1.5 LSB |
Moisture Sensitive | Yes |
Number of ADC Inputs | 2 Input |
Operating Supply Voltage | 1.8 V |
Product Type | ADCs - Analog to Digital Converters |
Sample and Hold | Yes |
SFDR - Spurious Free Dynamic Range | 82 dB |
SINAD - Signal to Noise and Distortion Ratio | 62.3 dB |
Factory Pack Quantity | 2000 |
Subcategory | Data Converter ICs |
For more information, please refer to datasheet
Documents
ADC11DV200CISQX/NOPB Datasheet |
More Information
The ADC11DV200 is a monolithic analog-to-digital converter capable of converting two analog input signals into 11-bit digital words at rates up to 200 Mega Samples Per Second (MSPS). The digital output mode is selectable and can be either differential LVDS or CMOS signals. This converter uses a differential, pipelined architecture with digital error correction and an on-chip sample-and-hold circuit to minimize die size and power consumption while providing excellent dynamic performance. A unique sample-and-hold stage yields a full-power bandwidth of 900MHz. Fabricated in core CMOS process, the ADC11DV200 may be operated from a single 1.8V power supply. The ADC11DV200 achieves approximately 10.06 effective bits at Nyquist and consumes just 280mW at 170MSPS in CMOS mode 450mW at 200MSPS in LVDS mode. The power consumption can be scaled down further by reducing sampling rates.