Description
ADC12040CIVYX/NOPB Texas Instruments - Yeehing Electronics
12-Bit 40MSPS Analog-to-Digital Converter (ADC)
Pricing (USD)
| Quantity | Unit Price |
| 1 — 99 | 15.121 |
| 100 — 249 | 13.208 |
| 250 — 999 | 10.184 |
| 1,000 + | 6.38 |
The above prices are for reference only.
Specifications
| Manufacturer | Texas Instruments |
| Product Category | Analog to Digital Converters - ADC |
| RoHS | Y |
| Series | ADC12040 |
| Mounting Style | SMD/SMT |
| Package / Case | LQFP-32 |
| Resolution | 12 bit |
| Number of Channels | 1 Channel |
| Sampling Rate | 40 MS/s |
| Input Type | Differential |
| Interface Type | Parallel |
| Architecture | Pipeline |
| Reference Type | External, Internal |
| Analog Supply Voltage | 4.75 V to 5.25 V |
| Digital Supply Voltage | 2.35 V to 5.25 V |
| SNR - Signal to Noise Ratio | 70 dB |
| Minimum Operating Temperature | - 40 C |
| Maximum Operating Temperature | + 85 C |
| Packaging | Reel |
| Features | Low Power |
| Height | 1.4 mm |
| Input Voltage | 4 V |
| Length | 7 mm |
| Number of Converters | 1 Converter |
| Power Consumption | 340 mW |
| Type | S/H ADC |
| Width | 7 mm |
| Brand | Texas Instruments |
| DNL - Differential Nonlinearity | +/- 0.4 LSB |
| ENOB - Effective Number of Bits | 11.2 Bit |
| Gain Error | 2.1 % FSR |
| INL - Integral Nonlinearity | 1.8 LSB |
| Moisture Sensitive | Yes |
| Number of ADC Inputs | 1 Input |
| Operating Supply Voltage | 5 V |
| Pd - Power Dissipation | 340 mW |
| Product Type | ADCs - Analog to Digital Converters |
| Sample and Hold | Yes |
| SFDR - Spurious Free Dynamic Range | 86 dB |
| SINAD - Signal to Noise and Distortion Ratio | 69 dB |
| Factory Pack Quantity | 1000 |
| Subcategory | Data Converter ICs |
| Unit Weight | 0.027302 oz |
For more information, please refer to datasheet
Documents
| ADC12040CIVYX/NOPB Datasheet |
More Information
The ADC12040 is a monolithic CMOS analog-to-digital converter capable of converting analog input signals into 12-bit digital words at 40 Megasamples per second (MSPS), minimum. This converter uses a differential, pipeline architecture with digital error correction and an on-chip sample-and-hold circuit to minimize die size and power consumption while providing excellent dynamic performance. Operating on a single 5V power supply, this device consumes just 340 mW at 40 MSPS, including the reference current. The Power Down feature reduces power consumption to 40 mW.
