ADC12DC105CISQ/NOPB Texas Instruments - Yeehing Electronics

Dual-Channel, 12-Bit, 105-MSPS, 1.0-GHz Input Bandwidth Analog-to-Digital Converter (ADC)

Pricing (USD)

Quantity	Unit Price
1 — 99	50.793
100 — 249	45.149
250 — 999	37.115
1,000 +	23.24

The above prices are for reference only.

Specifications

Manufacturer	Texas Instruments
Product Category	Analog to Digital Converters - ADC
RoHS	Y
Series	ADC12DC105
Mounting Style	SMD/SMT
Package / Case	WQFN-60
Resolution	12 bit
Number of Channels	2 Channel
Sampling Rate	105 MS/s
Input Type	Differential
Interface Type	Parallel
Architecture	Pipeline
Reference Type	External, Internal
Analog Supply Voltage	2.7 V to 3.6 V
Digital Supply Voltage	2.4 V to 3.6 V
SNR - Signal to Noise Ratio	71 dB
Minimum Operating Temperature	- 45 C
Maximum Operating Temperature	+ 85 C
Packaging	Reel
Features	Low Power
Height	0.8 mm
Input Voltage	2 V
Length	9 mm
Number of Converters	2 Converter
Power Consumption	800 mW
Type	S/H ADC
Width	9 mm
Brand	Texas Instruments
Development Kit	ADC12DC105LFEB/NOPB
DNL - Differential Nonlinearity	+/- 0.2 LSB
ENOB - Effective Number of Bits	11.2 Bit
Gain Error	1 % FSR
INL - Integral Nonlinearity	+/- 1.2 LSB
Moisture Sensitive	Yes
Number of ADC Inputs	2 Input
Operating Supply Voltage	3.3 V
Pd - Power Dissipation	800 mW
Product Type	ADCs - Analog to Digital Converters
Sample and Hold	Yes
SFDR - Spurious Free Dynamic Range	83 dB
SINAD - Signal to Noise and Distortion Ratio	69 dB
Factory Pack Quantity	2000
Subcategory	Data Converter ICs

For more information, please refer to datasheet

Documents

ADC12DC105CISQ/NOPB Datasheet

More Information

The ADC12DC105 is a high-performance CMOS analog-to-digital converter capable of converting two analog input signals into 12-bit digital words at rates up to 105 Mega Samples Per Second (MSPS). These converters use a differential, pipelined architecture with digital error correction and an on-chip sample-and-hold circuit to minimize power consumption and the external component count, while providing excellent dynamic performance. A unique sample-and-hold stage yields a full-power bandwidth of 1 GHz. The ADC12DC080/105 may be operated from a single +3.0V or +3.3V power supply. A power-down feature reduces the power consumption to very low levels while still allowing fast wake-up time to full operation. The differential inputs provide a 2V full scale differential input swing. A stable 1.2V internal voltage reference is provided, or the ADC12DC105 can be operated with an external 1.2V reference. Output data format (offset binary versus 2's complement) and duty cycle stabilizer are pin-selectable. The duty cycle stabilizer maintains performance over a wide range of clock duty cycles.