Texas Instruments
ADC12DL080CIVS/NOPB
ADC12DL080CIVS/NOPB
Couldn't load pickup availability
ADC12DL080CIVS/NOPB Texas Instruments - Yeehing Electronics
Dual-Channel, 12-Bit, 80-MSPS, 600-MHz Input Bandwidth Analog-to-Digital Converter (ADC)
Pricing (USD)
| Quantity | Unit Price |
| 1 — 99 | 24.763 |
| 100 — 249 | 22.012 |
| 250 — 999 | 18.095 |
| 1,000 + | 11.33 |
The above prices are for reference only.
Specifications
| Manufacturer | Texas Instruments |
| Product Category | Analog to Digital Converters - ADC |
| RoHS | Y |
| Series | ADC12DL080 |
| Mounting Style | SMD/SMT |
| Package / Case | TQFP-64 |
| Resolution | 12 bit |
| Number of Channels | 2 Channel |
| Sampling Rate | 80 MS/s |
| Input Type | Differential |
| Interface Type | Parallel |
| Architecture | Pipeline |
| Reference Type | External, Internal |
| Analog Supply Voltage | 3.3 V |
| Digital Supply Voltage | 2.4 V to 3.6 V |
| SNR - Signal to Noise Ratio | 69.3 dB |
| Minimum Operating Temperature | - 40 C |
| Maximum Operating Temperature | + 85 C |
| Packaging | Tray |
| Features | Low Power |
| Height | 1 mm |
| Input Voltage | 2 V |
| Length | 10 mm |
| Number of Converters | 2 Converter |
| Power Consumption | 447 mW |
| Type | S/H ADC |
| Width | 10 mm |
| Brand | Texas Instruments |
| DNL - Differential Nonlinearity | +/- 0.4 LSB |
| ENOB - Effective Number of Bits | 11 Bit |
| Gain Error | 3.5 % FSR |
| INL - Integral Nonlinearity | 3.5 LSB |
| Moisture Sensitive | Yes |
| Number of ADC Inputs | 2 Input |
| Operating Supply Voltage | 3.3 V |
| Product Type | ADCs - Analog to Digital Converters |
| Sample and Hold | Yes |
| SFDR - Spurious Free Dynamic Range | 82 dB |
| SINAD - Signal to Noise and Distortion Ratio | 69 dB |
| Factory Pack Quantity | 160 |
| Subcategory | Data Converter ICs |
| Unit Weight | 0.012720 oz |
For more information, please refer to datasheet
Documents
| ADC12DL080CIVS/NOPB Datasheet |
More Information
The ADC12DL080 is a dual, low power monolithic CMOS analog-to-digital converter capable of converting analog input signals into 12-bit digital words at 80 Megasamples per second (MSPS). This converter uses a differential, pipeline architecture with digital error correction and an on-chip sample-and-hold circuit to minimize power consumption while providing excellent dynamic performance and a 600 MHz Full Power Bandwidth. Operating on a single +3.3V power supply, the ADC12DL080 achieves 11.0 effective bits at Nyquist and consumes just 447mW at 80 MSPS. The Power Down feature reduces power consumption to 50 mW.
