ADC16DV160CILQX/NOPB Texas Instruments - Yeehing Electronics

Dual-Channel, 16-Bit, 160-MSPS Analog-to-Digital Converter (ADC)

Pricing (USD)

Quantity	Unit Price
1 — 99	133.354
100 — 249	120.708
250 — 999	117.259
1,000 +	80.47

The above prices are for reference only.

Specifications

Manufacturer	Texas Instruments
Product Category	Analog to Digital Converters - ADC
RoHS	Y
Series	ADS62C15
Mounting Style	SMD/SMT
Package / Case	VQFN-64
Resolution	11 bit
Number of Channels	2 Channel
Sampling Rate	125 MS/s
Input Type	Differential
Interface Type	Parallel
Architecture	Pipeline
Reference Type	External, Internal
Analog Supply Voltage	3.3 V
Digital Supply Voltage	1.65 V to 3.6 V
SNR - Signal to Noise Ratio	67.1 dB
Minimum Operating Temperature	- 40 C
Maximum Operating Temperature	+ 85 C
Packaging	Reel
Features	High Performance
Height	0.88 mm
Length	9 mm
Number of Converters	2 Converter
Output Type	LVDS
Power Consumption	740 mW
Width	9 mm
Brand	Texas Instruments
Development Kit	ADS62C15EVM
DNL - Differential Nonlinearity	+/- 0.8 LSB
ENOB - Effective Number of Bits	10.8 Bit
INL - Integral Nonlinearity	+/- 3.5 LSB
Moisture Sensitive	Yes
Operating Supply Voltage	1.65 V to 3.6 V, 3 V to 3.6 V
Pd - Power Dissipation	1225 mW
Product Type	ADCs - Analog to Digital Converters
SFDR - Spurious Free Dynamic Range	89 dB
SINAD - Signal to Noise and Distortion Ratio	67.1 dB
Factory Pack Quantity	2000
Subcategory	Data Converter ICs
Unit Weight	0.007383 oz

For more information, please refer to datasheet

Documents

ADC16DV160CILQX/NOPB Datasheet

More Information

The ADC16DV160 is a monolithic dual channel high performance CMOS analog-to-digital converter capable of converting analog input signals into 16-bit digital words at rates up to 160 Mega Samples Per Second (MSPS). This converter uses a differential, pipelined architecture with digital error correction and an on-chip sample-and-hold circuit to minimize power consumption and external component count while providing excellent dynamic performance. Automatic power-up calibration enables excellent dynamic performance and reduces part-to-part variation, and the ADC16DV160 can be re-calibrated at any time through the 3-wire Serial Peripheral Interface (SPI). An integrated low noise and stable voltage reference and differential reference buffer amplifier eases board level design. The on-chip duty cycle stabilizer with low additive jitter allows a wide range of input clock duty cycles without compromising dynamic performance. A unique sample-and-hold stage yields a full-power bandwidth of 1.4 GHz. The interface between the ADC16DV160 and a receiver block can be easily verified and optimized via fixed pattern generation and output clock position features. The digital data is provided via dual data rate LVDS outputs – making possible the 68-pin, 10 mm x 10 mm VQFN package. The ADC16DV160 operates on dual power supplies of +1.8V and +3.0V with a power-down feature to reduce power consumption to very low levels while allowing fast recovery to full operation.