ADC3221IRGZR


YeeHing #: Y004-ADC3221IRGZR
Inventory: 6200

Feel free to reach out to us for more information.
Click the button below to unveil exclusive discounts and delightful surprises.

Description

ADC3221IRGZR Texas Instruments - Yeehing Electronics

Dual-Channel, 12-Bit, 25-MSPS Analog-to-Digital Converter (ADC)

Pricing (USD)

Quantity Unit Price
1 — 99 16.036
100 — 249 14.007
250 — 999 10.8
1,000 + 6.76

The above prices are for reference only.

Specifications

Manufacturer Texas Instruments
Product Category Analog to Digital Converters - ADC
RoHS Y
Series ADC3221
Mounting Style SMD/SMT
Package / Case VQFN-48
Interface Type Serial LVDS
Minimum Operating Temperature - 40 C
Maximum Operating Temperature + 85 C
Packaging Reel
Features Low Power
Power Consumption 120 mW
Brand Texas Instruments
ENOB - Effective Number of Bits 11.5 Bit
Moisture Sensitive Yes
Product Type ADCs - Analog to Digital Converters
SFDR - Spurious Free Dynamic Range 93 dB
SINAD - Signal to Noise and Distortion Ratio 71 dB
Factory Pack Quantity 2500
Subcategory Data Converter ICs

For more information, please refer to datasheet

Documents

ADC3221IRGZR Datasheet

More Information

The ADC322x are a high-linearity, ultra-low power, dual-channel, 12-bit, 25-MSPS to 125-MSPS, analog-to-digital converter (ADC) family. The devices are designed specifically to support demanding, high input frequency signals with large dynamic range requirements. An input clock divider allows more flexibility for system clock architecture design and the SYSREF input enables complete system synchronization. The ADC322x family supports serial low-voltage differential signaling (LVDS) in order to reduce the number of interface lines, thus allowing for high system integration density. The serial LVDS interface is two-wire, where each ADC data are serialized and output over two LVDS pairs. Optionally, a one-wire serial LVDS interface is available. An internal phase-locked loop (PLL) multiplies the incoming ADC sampling clock to derive the bit clock that is used to serialize the 12-bit output data from each channel. In addition to the serial data streams, the frame and bit clocks are also transmitted as LVDS outputs.

You may also like

Recently viewed