Description
ADC3421IRTQT Texas Instruments - Yeehing Electronics
Quad-channel 12-bit 25-MSPS analog-to-digital converter (ADC)
Pricing (USD)
Quantity | Unit Price |
1 — 99 | 22.757 |
100 — 249 | 20.229 |
250 — 999 | 16.629 |
1,000 + | 10.41 |
The above prices are for reference only.
Specifications
Manufacturer | Texas Instruments |
Product Category | Analog to Digital Converters - ADC |
RoHS | Y |
Series | ADC3421 |
Mounting Style | SMD/SMT |
Package / Case | QFN-56 |
Interface Type | I2C |
Minimum Operating Temperature | - 40 C |
Maximum Operating Temperature | + 85 C |
Packaging | Reel |
Features | Low Power |
Power Consumption | 177 mW |
Brand | Texas Instruments |
ENOB - Effective Number of Bits | 11.5 Bit |
Moisture Sensitive | Yes |
Product Type | ADCs - Analog to Digital Converters |
SFDR - Spurious Free Dynamic Range | 93 dB |
SINAD - Signal to Noise and Distortion Ratio | 71 dB |
Factory Pack Quantity | 250 |
Subcategory | Data Converter ICs |
Unit Weight | 0.006924 oz |
For more information, please refer to datasheet
Documents
ADC3421IRTQT Datasheet |
More Information
The ADC342x are a high-linearity, ultra-low power, quad-channel, 12-bit, 25-MSPS to 125-MSPS, analog-to-digital converter (ADC) family. The devices are designed specifically to support demanding, high input frequency signals with large dynamic range requirements. An input clock divider allows more flexibility for system clock architecture design and the SYSREF input enables complete system synchronization. The ADC342x family supports serial low-voltage differential signaling (LVDS) in order to reduce the number of interface lines, thus allowing for high system integration density. The serial LVDS interface is two-wire, where each ADC data are serialized and output over two LVDS pairs. An internal phase-locked loop (PLL) multiplies the incoming ADC sampling clock to derive the bit clock that is used to serialize the 12-bit output data from each channel. In addition to the serial data streams, the frame and bit clocks are also transmitted as LVDS outputs.