Description
ADC34J42IRGZT Texas Instruments - Yeehing Electronics
Quad-Channel, 14-Bit, 50-MSPS Analog-to-Digital Converter (ADC)
Pricing (USD)
| Quantity | Unit Price |
| 1 — 99 | 44.693 |
| 100 — 249 | 39.727 |
| 250 — 999 | 32.658 |
| 1,000 + | 20.45 |
The above prices are for reference only.
Specifications
| Manufacturer | Texas Instruments |
| Product Category | Analog to Digital Converters - ADC |
| RoHS | Y |
| Series | ADC34J42 |
| Mounting Style | SMD/SMT |
| Package / Case | VQFN-48 |
| Resolution | 14 bit |
| Number of Channels | 4 Channel |
| Sampling Rate | 50 MS/s |
| Input Type | Differential |
| Interface Type | JESD204B |
| Architecture | Pipeline |
| Reference Type | External, Internal |
| Analog Supply Voltage | 1.8 V |
| Digital Supply Voltage | 1.8 V |
| SNR - Signal to Noise Ratio | 69.9 dB |
| Minimum Operating Temperature | - 40 C |
| Maximum Operating Temperature | + 85 C |
| Packaging | Reel |
| Features | Low Power |
| Number of Converters | 4 Converter |
| Power Consumption | 491 mW |
| Type | ADC |
| Brand | Texas Instruments |
| ENOB - Effective Number of Bits | 11.9 Bit |
| Moisture Sensitive | Yes |
| Operating Supply Voltage | 1.8 V |
| Pd - Power Dissipation | 491 mW |
| Product Type | ADCs - Analog to Digital Converters |
| SFDR - Spurious Free Dynamic Range | 100 dB |
| SINAD - Signal to Noise and Distortion Ratio | 73.2 dB |
| Factory Pack Quantity | 250 |
| Subcategory | Data Converter ICs |
| Unit Weight | 0.004868 oz |
For more information, please refer to datasheet
Documents
| ADC34J42IRGZT Datasheet |
More Information
The ADC34J4x is a high-linearity, ultra-low power, quad-channel, 14-bit, 50-MSPS to 160-MSPS, analog-to-digital converter (ADC). The devices are designed specifically to support demanding, high input frequency signals with large dynamic range requirements. A clock input divider allows more flexibility for system clock architecture design while the SYSREF input enables complete system synchronization. The ADC34J4x family supports serial current-mode logic (CML) and JESD204B interfaces in order to reduce the number of interface lines, thus allowing high system integration density. The JESD204B interface is a serial interface, where the data of each ADC are serialized and output over only one differential pair. An internal phase-locked loop (PLL) multiplies the incoming ADC sampling clock by 20 to derive the bit clock that is used to serialize the 14-bit data from each channel. The ADC34J4x devices support subclass 1 with interface speeds up to 3.2 Gbps.
