Description
ADS54J66IRMP Texas Instruments - Yeehing Electronics
Quad-Channel, 14-Bit, 500-MSPS Analog-to-Digital Converter (ADC)
Pricing (USD)
| Quantity | Unit Price |
| 1 — 99 | 750.219 |
| 100 — 249 | 690.678 |
| 250 — 999 | 595.412 |
| 1,000 + | 525.15 |
The above prices are for reference only.
Specifications
| Manufacturer | Texas Instruments |
| Product Category | Analog to Digital Converters - ADC |
| RoHS | Y |
| Series | ADS4246 |
| Mounting Style | SMD/SMT |
| Package / Case | VQFN-64 |
| Resolution | 14 bit |
| Number of Channels | 2 Channel |
| Sampling Rate | 160 MS/s |
| Input Type | Differential |
| Interface Type | Parallel |
| Architecture | Pipeline |
| Analog Supply Voltage | 1.8 V |
| Digital Supply Voltage | 1.8 V |
| SNR - Signal to Noise Ratio | 72.8 dB |
| Minimum Operating Temperature | - 40 C |
| Maximum Operating Temperature | + 85 C |
| Packaging | Reel |
| Features | Low Power |
| Number of Converters | 2 Converter |
| Output Type | CMOS, LVDS |
| Power Consumption | 332 mW |
| Product | Analog to Digital Converters |
| Brand | Texas Instruments |
| Development Kit | ADS4246EVM |
| DNL - Differential Nonlinearity | +/- 1.7 LSB |
| ENOB - Effective Number of Bits | 11.8 Bit |
| Operating Supply Voltage | 1.7 V to 1.9 V |
| Pd - Power Dissipation | 166 mW |
| Product Type | ADCs - Analog to Digital Converters |
| SFDR - Spurious Free Dynamic Range | 87 dB |
| SINAD - Signal to Noise and Distortion Ratio | 72.6 dB |
| Factory Pack Quantity | 250 |
| Subcategory | Data Converter ICs |
| Unit Weight | 0.008021 oz |
For more information, please refer to datasheet
Documents
| ADS54J66IRMP Datasheet |
More Information
The ADS54J66 is a low-power, wide-bandwidth, 14-bit, 500-MSPS, quad-channel, telecom receiver device. The ADS54J66 supports a JESD204B serial interface with data rates up to 10 Gbps with one lane per channel. The buffered analog input provides uniform input impedance across a wide frequency range and minimizes sample-and-hold glitch energy. The ADS54J66 provides excellent spurious-free dynamic range (SFDR) over a large input frequency range with very low power consumption. The digital signal processing block includes complex mixers followed by low-pass filters with decimate-by-2 and -4 options supporting up to 200-MHz receive bandwidth.
