Texas Instruments
ADS7142IRUGR
ADS7142IRUGR
Regular price
$0.58 USD
Regular price
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$0.58 USD
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ADS7142IRUGR Texas Instruments - Yeehing Electronics
12-bit 140-kSPS 2-ch nanopower SAR ADC with 1.8-V operation in 1.5-mm x 2-mm QFN package
Pricing (USD)
| Quantity | Unit Price |
| 1 — 99 | 1.848 |
| 100 — 249 | 1.526 |
| 250 — 999 | 1.096 |
| 1,000 + | 0.58 |
The above prices are for reference only.
Specifications
| Manufacturer | Texas Instruments |
| Product Category | Analog to Digital Converters - ADC |
| RoHS | Y |
| Series | ADS7142 |
| Mounting Style | SMD/SMT |
| Package / Case | X2QFN-10 |
| Resolution | 12 bit |
| Number of Channels | 2 Channel |
| Sampling Rate | 140 kS/s |
| Input Type | Pseudo-Differential/Single-Ended |
| Interface Type | I2C |
| Architecture | SAR |
| Reference Type | External, Internal |
| Analog Supply Voltage | 1.65 V to 3.6 V |
| Digital Supply Voltage | 1.65 V to 3.6 V |
| SNR - Signal to Noise Ratio | 70 dB |
| Minimum Operating Temperature | - 40 C |
| Maximum Operating Temperature | + 125 C |
| Packaging | Reel |
| Features | Comparator, Oscillator, Small Size |
| Number of Converters | 2 Converter |
| Output Type | Digital |
| Power Consumption | 0.0009 mW |
| Type | Nanopower, Programmable Sensor Monitor |
| Brand | Texas Instruments |
| Shutdown | No Shutdown |
| Development Kit | ADS7142EVM |
| DNL - Differential Nonlinearity | 0.3 LSB |
| ENOB - Effective Number of Bits | 14.4 bit |
| FPBW - Full Power Bandwidth | 25 MHz |
| Gain Error | 0.03 %FS |
| INL - Integral Nonlinearity | 0.5 LSB |
| Moisture Sensitive | Yes |
| Product Type | ADCs - Analog to Digital Converters |
| SFDR - Spurious Free Dynamic Range | 88 dB |
| SINAD - Signal to Noise and Distortion Ratio | 71 dB |
| Factory Pack Quantity | 3000 |
| Subcategory | Data Converter ICs |
| THD - Total Harmonic Distortion | - 83.5 dB |
For more information, please refer to datasheet
Documents
| ADS7142IRUGR Datasheet |
More Information
The ADS7142 autonomously monitors signals while optimizing system power, reliability, and performance. It implements event-triggered interrupts per channel using a digital windowed comparator with programmable high and low thresholds, hysteresis, and event counter. The device includes a dual-channel analog multiplexer in front of a successive approximation register analog-to-digital converter (SAR ADC) followed by an internal data buffer for converting and capturing data from sensors.
