CDC536DBR Texas Instruments - Yeehing Electronics

100-MHz, 3.3-V PLL clock driver with 1/2x, 1x and 2x frequency options

Pricing (USD)

Quantity	Unit Price
1 — 99	7.805
100 — 249	6.363
250 — 999	5.001
1,000 +	2.97

The above prices are for reference only.

Specifications

For more information, please refer to datasheet

Documents

CDC536DBR Datasheet

More Information

The CDC536 is a high-performance, low-skew, low-jitter clock driver. It uses a phase-lock loop (PLL) to precisely align, in both frequency and phase, the clock output signals to the clock input (CLKIN) signal. It is specifically designed for use with synchronous DRAMs and popular microprocessors operating at speeds from 50 MHz to 100 MHz or down to 25 MHz on outputs configured as half-frequency outputs. The CDC536 operates at 3.3-V VCC and is designed to drive a 50-W transmission line.