Texas Instruments
CDCM9102RHBR
CDCM9102RHBR
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CDCM9102RHBR Texas Instruments - Yeehing Electronics
Low noise two channel 100-MHz PCIe clock generator
Pricing (USD)
| Quantity | Unit Price |
| 1 — 99 | 3.433 |
| 100 — 249 | 2.799 |
| 250 — 999 | 2.2 |
| 1,000 + | 1.31 |
The above prices are for reference only.
Specifications
| Manufacturer | Texas Instruments |
| Product Category | Clock Synthesizer / Jitter Cleaner |
| RoHS | Y |
| Series | CDCM9102 |
| Number of Outputs | 9 Output |
| Output Level | LVDS, LVPECL |
| Max Output Freq | 1296 MHz |
| Input Level | LVCMOS, LVDS, LVPECL |
| Minimum Operating Temperature | - 40 C |
| Maximum Operating Temperature | + 85 C |
| Mounting Style | SMD/SMT |
| Package / Case | VQFN-32 |
| Packaging | Reel |
| Features | Design Tool Available |
| Brand | Texas Instruments |
| Development Kit | CDCM9102EVM |
| Moisture Sensitive | Yes |
| Operating Supply Voltage | 3.3 V |
| Product Type | Clock Synthesizer / Jitter Cleaner |
| Factory Pack Quantity | 3000 |
| Subcategory | Clock & Timer ICs |
| Unit Weight | 0.002547 oz |
For more information, please refer to datasheet
Documents
| CDCM9102RHBR Datasheet |
More Information
The CDCM9102 is a low-jitter clock generator designed to provide reference clocks for communications standards such as PCI Express™. The device supports up to PCIE gen3 and is easy to configure and use. The CDCM9102 provides two 100-MHz differential clock ports. The output types supported for these ports include LVPECL, LVDS, or a pair of LVCMOS buffers. HCSL signaling is supported using an AC-coupled network. The user configures the output buffer type desired by strapping device pins. Additionally, a single-ended 25-MHz clock output port is provided. Uses for this port include general-purpose clocking, clocking Ethernet PHYs, or providing a reference clock for additional clock generators. All clocks generated are derived from a single external 25-MHz crystal.
