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Texas Instruments

CY74FCT2574ATSOC

CY74FCT2574ATSOC

Regular price $0.28 USD
Regular price Sale price $0.28 USD
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CY74FCT2574ATSOC Texas Instruments - Yeehing Electronics

Octal D-Type Registers with 3-State Outputs and Series Damping Resistors

Pricing (USD)

Quantity Unit Price
1 — 99 0.986
100 — 249 0.758
250 — 999 0.558
1,000 + 0.28

The above prices are for reference only.

Specifications

Manufacturer Texas Instruments
Product Category Flip Flops
RoHS Y
Number of Circuits 8
Logic Family 74FCT
Logic Type Register
Polarity Non-Inverting
Input Type Single-Ended
Output Type Single-Ended
Propagation Delay Time 6.5 ns
High Level Output Current - 15 mA
Low Level Output Current 12 mA
Supply Voltage - Min 4.75 V
Supply Voltage - Max 5.25 V
Minimum Operating Temperature - 40 C
Maximum Operating Temperature + 85 C
Mounting Style SMD/SMT
Package / Case SOIC-20
Packaging Reel
Function D-Type Bus Interface
Height 2.35 mm
Length 12.8 mm
Operating Temperature Range - 40 C to + 85 C
Series CY74FCT2574T
Width 7.52 mm
Brand Texas Instruments
Number of Channels 8
Number of Input Lines 8
Number of Output Lines 3
Operating Supply Voltage 4.75 V to 5.25 V
Product Type Flip Flops
Factory Pack Quantity 2000
Subcategory Logic ICs
Unit Weight 0.017662 oz

For more information, please refer to datasheet

Documents

CY74FCT2574ATSOC Datasheet

More Information

The CY74FCT2574T is a high-speed, low-power, octal D-type flip-flop featuring separate D-type inputs for each flip-flop. On-chip termination resistors at the outputs reduce system noise caused by reflections. The CY74FCT2574T can replace the CY74FCT574T to reduce noise in an existing design. This device has 3-state outputs for bus-oriented applications. A buffered clock (CP) and output-enable (OE) inputs are common to all flip-flops. The CY74FCT2574T is identical to the CY74FCT2374T, except that on the CY74FCT2574T all outputs are on one side of the package and all inputs are on the other side. The flip-flops in the CY74FCT2574T store the state of their individual D inputs that meet the setup-time and hold-time requirements on the low-to-high CP transition. When OE is low, the contents of the flip-flops are available at the outputs. When OE is high, the outputs are in the high-impedance state. The state of OE does not affect the state of the flip-flops.

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