Description
CY74FCT646ATQCT Texas Instruments - Yeehing Electronics
Octal Registered Bus Transceivers with 3-State Outputs
Pricing (USD)
Quantity | Unit Price |
1 — 99 | 1.092 |
100 — 249 | 0.84 |
250 — 999 | 0.618 |
1,000 + | 0.31 |
The above prices are for reference only.
Specifications
Manufacturer | Texas Instruments |
Product Category | Bus Transceivers |
RoHS | Y |
Logic Family | FCT |
Input Level | TTL |
Output Level | TTL |
Output Type | 3-State |
High Level Output Current | - 32 mA |
Low Level Output Current | 64 mA |
Propagation Delay Time | 6.3 ns |
Supply Voltage - Max | 5.25 V |
Supply Voltage - Min | 4.75 V |
Minimum Operating Temperature | - 40 C |
Maximum Operating Temperature | + 85 C |
Package / Case | QSOP-24 |
Packaging | Reel |
Function | Tri-State 8-Bit |
Height | 1.5 mm |
Length | 8.75 mm |
Number of Circuits | 8 |
Operating Temperature Range | - 40 C to + 85 C |
Product | Registered Transceiver |
Series | CY74FCT646T |
Technology | CMOS |
Width | 4 mm |
Brand | Texas Instruments |
Mounting Style | SMD/SMT |
Number of Channels | 8 |
Moisture Sensitive | Yes |
Operating Supply Voltage | 4.75 V to 5.25 V |
Polarity | Non-Inverting |
Product Type | Bus Transceivers |
Factory Pack Quantity | 2500 |
Subcategory | Logic ICs |
Triggering Type | Positive Edge |
Unit Weight | 0.059966 oz |
For more information, please refer to datasheet
Documents
CY74FCT646ATQCT Datasheet |
More Information
The x92FCT646T devices consist of a bus transceiver circuit with 3-state, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers. Data on the A or B bus is clocked into the registers as the appropriate clock pin goes to a high logic level. Output-enable (G) and direction (DIR) inputs control the transceiver function. In the transceiver mode,data present at the high-impedance port can be stored in either the A or B register, or in both. Select controls (SAB, SBA) can multiplex stored and real-time (transparent mode) data. DIR determines which bus receives data when G is low. In the isolation mode (G is high), A data can be stored in the B register and/or B data can be stored in the A register.