Texas Instruments
LM5104SDX/NOPB
LM5104SDX/NOPB
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LM5104SDX/NOPB Texas Instruments - Yeehing Electronics
2-A, 100-V half bridge gate driver with 8-V UVLO and adaptive delay
Pricing (USD)
| Quantity | Unit Price |
| 1 — 99 | 2.248 |
| 100 — 249 | 1.97 |
| 250 — 999 | 1.381 |
| 1,000 + | 0.64 |
The above prices are for reference only.
Specifications
| Manufacturer | Texas Instruments |
| Product Category | Gate Drivers |
| RoHS | Y |
| Type | High Side, Low Side |
| Mounting Style | SMD/SMT |
| Package / Case | WSON-10 |
| Number of Drivers | 2 Driver |
| Number of Outputs | 2 Output |
| Output Current | 1.8 A |
| Rise Time | 600 ns |
| Fall Time | 600 ns |
| Supply Voltage - Min | 9 V |
| Supply Voltage - Max | 14 V |
| Propagation Delay - Max | 56 ns |
| Operating Supply Current | 3 mA |
| Minimum Operating Temperature | - 40 C |
| Maximum Operating Temperature | + 125 C |
| Series | LM5104 |
| Packaging | Reel |
| Features | Synchronous |
| Height | 0.8 mm |
| Length | 4 mm |
| Operating Temperature Range | - 40 C to + 125 C |
| Technology | Si |
| Width | 4 mm |
| Brand | Texas Instruments |
| Logic Type | CMOS |
| Operating Supply Voltage | 7.5 V to 14 V |
| Product Type | Gate Drivers |
| Factory Pack Quantity | 4500 |
| Subcategory | PMIC - Power Management ICs |
For more information, please refer to datasheet
Documents
| LM5104SDX/NOPB Datasheet |
More Information
The LM5104 High-Voltage Gate Driver is designed to drive both the high-side and the low-side N-channel MOSFETs in a synchronous buck configuration. The floating high-side driver can work with supply voltages up to 100 V. The high-side and low-side gate drivers are controlled from a single input. Each change in state is controlled in an adaptive manner to prevent shoot-through issues. In addition to the adaptive transition timing, an additional delay time can be added, proportional to an external setting resistor. An integrated high-voltage diode is provided to charge high-side gate drive bootstrap capacitor. A robust level shifter operates at high speed while consuming low power and providing clean level transitions from the control logic to the high-side gate driver. Undervoltage lockout is provided on both the low-side and the high-side power rails. This device is available in the standard SOIC and the WSON packages.
