LMK1D1212RHAR Texas Instruments - Yeehing Electronics

12-channel output 1.8-V, 2.5-V, and 3.3-V LVDS buffer

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Specifications

For more information, please refer to datasheet

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More Information

The LMK1D1212 clock buffer distributes with minimum skew one of two selectable clock inputs (IN0, IN1) to 12 pairs of differential LVDS clock outputs (OUT0 through OUT11). Similarly, the LMK1D1216 distributes 16 pairs of differential LVDS clock outputs (OUT0 through OUT15). The LMK1D121x family can accept two clock sources into an input multiplexer. The inputs can either be LVDS, LVPECL, LP-HCSL, HCSL, CML, or LVCMOS.