LMK61PD0A2-SIAR Texas Instruments - Yeehing Electronics

±50 ppm, ultra-low jitter, pin selectable, differential oscillator

Pricing (USD)

Quantity	Unit Price
1 — 99	12.052
100 — 249	10.527
250 — 999	8.117
1,000 +	5.08

The above prices are for reference only.

Specifications

For more information, please refer to datasheet

Documents

LMK61PD0A2-SIAR Datasheet

More Information

The LMK61PD0A2 is an ultra-low jitter PLLatinum™ pin selectable oscillator that generates commonly used reference clocks. The device is pre-programmed in factory to support seven unique reference clock frequencies that can be selected by pin-strapping each of FS[1:0] to VDD, GND or NC (no connect). Output format is selected between LVPECL, LVDS, or HCSL by pin-strapping OS to VDD, GND or NC. Internal power conditioning provide excellent power supply ripple rejection (PSRR), reducing the cost and complexity of the power delivery network. The device operates from a single 3.3 V ± 5% supply.