SN65DSI86ZXHR Texas Instruments - Yeehing Electronics

Dual-channel MIPI® DSI to embedded DisplayPort™ (eDP ) bridge

Pricing (USD)

Quantity	Unit Price
1 — 99	7.594
100 — 249	6.191
250 — 999	4.866
1,000 +	2.89

The above prices are for reference only.

Specifications

For more information, please refer to datasheet

Documents

SN65DSI86ZXHR Datasheet

More Information

The SN65DSI86 DSI to embedded DisplayPort (eDP) bridge features a dual-channel MIPI D-PHY receiver front-end configuration with four lanes per channel operating at 1.5 Gbps per lane and a maximum input bandwidth of 12 Gbps. The bridge decodes MIPI DSI 18-bpp RGB666 and 24-bpp RGB888 packets and converts the formatted video data stream to a DisplayPort with up to four lanes at either 1.62 Gbps, 2.16 Gbps, 2.43 Gbps, 2.7 Gbps, 3.24 Gbps, 4.32 Gbps, or 5.4 Gbps.