Texas Instruments
SN65LVDS104D
SN65LVDS104D
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SN65LVDS104D Texas Instruments - Yeehing Electronics
1:4 LVDS clock fanout buffer
Pricing (USD)
| Quantity | Unit Price |
| 1 — 99 | 4.638 |
| 100 — 249 | 4.064 |
| 250 — 999 | 2.849 |
| 1,000 + | 1.84 |
The above prices are for reference only.
Specifications
| Manufacturer | Texas Instruments |
| Product Category | Clock Drivers & Distribution |
| RoHS | Y |
| Series | SN65LVDS104 |
| Multiply / Divide Factor | 1 |
| Output Type | LVDS |
| Max Output Freq | 400 MHz |
| Supply Voltage - Max | 3.6 V |
| Supply Voltage - Min | 3 V |
| Minimum Operating Temperature | - 40 C |
| Maximum Operating Temperature | + 85 C |
| Mounting Style | SMD/SMT |
| Package / Case | SOP-16 |
| Packaging | Tube |
| Type | LVDS, TTL |
| Brand | Texas Instruments |
| Maximum Data Rate | 400 Mbps |
| Operating Supply Current | 23 mA |
| Pd - Power Dissipation | 950 mW |
| Product Type | Clock Drivers & Distribution |
| Factory Pack Quantity | 40 |
| Subcategory | Clock & Timer ICs |
| Unit Weight | 0.005644 oz |
For more information, please refer to datasheet
Documents
| SN65LVDS104D Datasheet |
More Information
The SN65LVDS10x are a differential line receiver and a LVTTL input (respectively) connected to four differential line drivers that implement the electrical characteristics of low-voltage differential signaling (LVDS). LVDS, as specified in EIA/TIA-644 is a data signaling technique that offers low-power, low-noise coupling, and switching speeds to transmit data at relatively long distances. (Note: The ultimate rate and distance of data transfer is dependent upon the attenuation characteristics of the media, the noise coupling to the environment, and other system characteristics.)
