SN65LVDS104DR Texas Instruments - Yeehing Electronics

1:4 LVDS clock fanout buffer

Pricing (USD)

Quantity	Unit Price
1 — 99	3.951
100 — 249	3.462
250 — 999	2.427
1,000 +	1.37

The above prices are for reference only.

Specifications

For more information, please refer to datasheet

Documents

SN65LVDS104DR Datasheet

More Information

The SN65LVDS10x are a differential line receiver and a LVTTL input (respectively) connected to four differential line drivers that implement the electrical characteristics of low-voltage differential signaling (LVDS). LVDS, as specified in EIA/TIA-644 is a data signaling technique that offers low-power, low-noise coupling, and switching speeds to transmit data at relatively long distances. (Note: The ultimate rate and distance of data transfer is dependent upon the attenuation characteristics of the media, the noise coupling to the environment, and other system characteristics.)