Texas Instruments
SN65LVDS311YFFR
SN65LVDS311YFFR
Regular price
$1.29 USD
Regular price
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$1.29 USD
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SN65LVDS311YFFR Texas Instruments - Yeehing Electronics
Programmable 27-bit display serial interface transmitter
Pricing (USD)
| Quantity | Unit Price |
| 1 — 99 | 3.4 |
| 100 — 249 | 2.772 |
| 250 — 999 | 2.179 |
| 1,000 + | 1.29 |
The above prices are for reference only.
Specifications
| Manufacturer | Texas Instruments |
| Product Category | Serializers & Deserializers - Serdes |
| RoHS | Y |
| Type | Serializer |
| Data Rate | 566 Mb/s |
| Input Type | CMOS |
| Output Type | SubLVDS |
| Number of Inputs | 27 Input |
| Number of Outputs | 3 Output |
| Operating Supply Voltage | 1.65 V to 1.95 V |
| Minimum Operating Temperature | - 40 C |
| Maximum Operating Temperature | + 85 C |
| Mounting Style | SMD/SMT |
| Package / Case | DSBGA-49 |
| Packaging | Reel |
| Series | SN65LVDS311 |
| Brand | Texas Instruments |
| Product Type | Serializers & Deserializers - Serdes |
| Factory Pack Quantity | 3000 |
| Subcategory | Interface ICs |
| Unit Weight | 0.000321 oz |
For more information, please refer to datasheet
Documents
| SN65LVDS311YFFR Datasheet |
More Information
The SN65LVDS311 serializer transmits 27 parallel input data over 1, 2, or 3 serial output links. The device pinout is optimized to interface with the OMAP3630 application processor. The device loads a shift register with the 24 pixel bits and 3 control bits from the parallel CMOS input interface. The data are latched into the device by the pixel clock, PCLK. In addition to the 27 bits, the device adds a parity bit and two reserved bits for a total number of 30 serial bits. The parity bit allows a receiver to detect single-bit errors. Odd parity is implemented.
