Texas Instruments
SN74ALS109AN
SN74ALS109AN
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SN74ALS109AN Texas Instruments - Yeehing Electronics
Dual J-K Positive-Edge-Triggered Flip-Flops With Clear and Preset
Pricing (USD)
| Quantity | Unit Price |
| 1 — 99 | 1.407 |
| 100 — 249 | 1.162 |
| 250 — 999 | 0.835 |
| 1,000 + | 0.44 |
The above prices are for reference only.
Specifications
| Manufacturer | Texas Instruments |
| Product Category | Flip Flops |
| RoHS | Y |
| Number of Circuits | 2 |
| Logic Family | ALS |
| Logic Type | J-K Type Flip-Flop |
| Polarity | Inverting/Non-Inverting |
| Input Type | TTL |
| Output Type | TTL |
| Propagation Delay Time | 18 ns |
| High Level Output Current | - 0.4 mA |
| Low Level Output Current | 8 mA |
| Supply Voltage - Min | 4.5 V |
| Supply Voltage - Max | 5.5 V |
| Minimum Operating Temperature | 0 C |
| Maximum Operating Temperature | + 70 C |
| Mounting Style | Through Hole |
| Package / Case | PDIP-16 |
| Packaging | Tube |
| Function | Contains 2 Independent J-K Positive Edge Triggered Flip-Flops |
| Height | 4.57 mm |
| Length | 19.3 mm |
| Operating Temperature Range | 0 C to + 70 C |
| Series | SN74ALS109A |
| Width | 6.35 mm |
| Brand | Texas Instruments |
| Number of Channels | 2 |
| Number of Input Lines | 5 |
| Number of Output Lines | 2 |
| Operating Supply Voltage | 4.5 V to 5.5 V |
| Product Type | Flip Flops |
| Reset Type | Set, Reset |
| Factory Pack Quantity | 25 |
| Subcategory | Logic ICs |
| Unit Weight | 0.033570 oz |
For more information, please refer to datasheet
Documents
| SN74ALS109AN Datasheet |
More Information
These devices contain two independent J-K positive-edge-triggered flip-flops. A low level at the preset () or clear () inputs sets or resets the outputs regardless of the levels of the other inputs. When and are inactive (high), data at the J and K inputs meeting the setup-time requirements are transferred to the outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval, data at the J and K inputs can be changed without affecting the levels at the outputs. These versatile flip-flops can perform as toggle flip-flops by grounding K and tying J high. They also can perform as D-type flip-flops if J and K are tied together.
