Texas Instruments
SN74ALS164ANSR
SN74ALS164ANSR
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SN74ALS164ANSR Texas Instruments - Yeehing Electronics
8-Bit Parallel-Out Serial Shift Registers
Pricing (USD)
| Quantity | Unit Price |
| 1 — 99 | 2.141 |
| 100 — 249 | 1.876 |
| 250 — 999 | 1.315 |
| 1,000 + | 0.74 |
The above prices are for reference only.
Specifications
| Manufacturer | Texas Instruments |
| Product Category | Counter Shift Registers |
| RoHS | Y |
| Counting Sequence | Serial to Parallel |
| Number of Circuits | 1 |
| Number of Bits | 8 bit |
| Package / Case | SO-14 |
| Logic Family | ALS |
| Logic Type | Bipolar |
| Number of Input Lines | 2 |
| Propagation Delay Time | 11 ns |
| Supply Voltage - Min | 4.5 V |
| Supply Voltage - Max | 5.5 V |
| Minimum Operating Temperature | 0 C |
| Maximum Operating Temperature | + 70 C |
| Packaging | Reel |
| Features | No Parallel Enable Input |
| Function | Shift Register |
| Height | 1.95 mm |
| Length | 10.3 mm |
| Operating Temperature Range | 0 C to + 70 C |
| Series | SN74ALS164A |
| Width | 5.3 mm |
| Brand | Texas Instruments |
| Mounting Style | SMD/SMT |
| Number of Output Lines | 8 |
| Operating Supply Voltage | 5 V |
| Product Type | Counter Shift Registers |
| Reset Type | Asynchronous |
| Factory Pack Quantity | 2000 |
| Subcategory | Logic ICs |
| Triggering Type | Positive Edge |
| Unit Weight | 0.007408 oz |
For more information, please refer to datasheet
Documents
| SN74ALS164ANSR Datasheet |
More Information
This 8-bit parallel-out serial shift register features AND-gated serial (A and B) inputs and an asynchronous clear (CLR) input. The gated serial inputs permit control over incoming data because a low at either input inhibits entry of the new data and resets the first flip-flop to the low level at the next clock pulse. A high-level input enables the other input, which determines the state of the first flip-flop. Data at the serial inputs can be changed while the clock is high or low, provided that the minimum setup-time requirements are met. Clocking occurs on the low-to-high-level transition of the clock (CLK) input. All inputs are diode clamped to minimize transmission-line effects.
