Description
SN74AS74ANSR Texas Instruments - Yeehing Electronics
Dual Positive-Edge-Triggered D-Type Flip-Flops With Preset And Clear
Pricing (USD)
Quantity | Unit Price |
1 — 99 | 1.163 |
100 — 249 | 0.96 |
250 — 999 | 0.69 |
1,000 + | 0.42 |
The above prices are for reference only.
Specifications
Manufacturer | Texas Instruments |
Product Category | Flip Flops |
RoHS | Y |
Number of Circuits | 2 |
Logic Family | AS |
Logic Type | D-Type Edge Triggered Flip-Flop |
Polarity | Inverting/Non-Inverting |
Input Type | TTL |
Output Type | TTL |
Propagation Delay Time | 9 ns |
High Level Output Current | - 2 mA |
Low Level Output Current | 20 mA |
Supply Voltage - Min | 4.5 V |
Supply Voltage - Max | 5.5 V |
Minimum Operating Temperature | 0 C |
Maximum Operating Temperature | + 70 C |
Mounting Style | SMD/SMT |
Package / Case | SO-14 |
Packaging | Reel |
Function | D-Type |
Height | 1.95 mm |
Length | 10.3 mm |
Operating Temperature Range | 0 C to + 70 C |
Series | SN74AS74A |
Width | 5.3 mm |
Brand | Texas Instruments |
Number of Channels | 2 |
Number of Input Lines | 4 |
Number of Output Lines | 2 |
Operating Supply Voltage | 5 V |
Product Type | Flip Flops |
Reset Type | Set, Reset |
Factory Pack Quantity | 2000 |
Subcategory | Logic ICs |
Unit Weight | 0.007348 oz |
For more information, please refer to datasheet
Documents
SN74AS74ANSR Datasheet |
More Information
These devices contain two independent positive-edge-triggered D-type flip-flops. A low level at the preset () or clear () inputs sets or resets the outputs regardless of the levels of the other inputs. When and are inactive (high), data at the data (D) input meeting the setup-time requirements are transferred to the outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of CLK. Following the hold-time interval, data at the D input can be changed without affecting the levels at the outputs.