Texas Instruments
SN74GTLP1394PW
SN74GTLP1394PW
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SN74GTLP1394PW Texas Instruments - Yeehing Electronics
2-Bit LVTTL-to-GTLP Adj-Edge-Rate Bus Xcvr w/Split LVTTL Port, Feedback Path, & Selectable Polarity
Pricing (USD)
| Quantity | Unit Price |
| 1 — 99 | 3.032 |
| 100 — 249 | 2.657 |
| 250 — 999 | 1.863 |
| 1,000 + | 1.05 |
The above prices are for reference only.
Specifications
| Manufacturer | Texas Instruments |
| Product Category | Translation - Voltage Levels |
| RoHS | Y |
| Type | LVTTL/GTLP |
| Propagation Delay Time | 8.6 ns |
| Supply Voltage - Max | 3.45 V |
| Supply Voltage - Min | 3.15 V |
| Minimum Operating Temperature | - 40 C |
| Maximum Operating Temperature | + 85 C |
| Mounting Style | SMD/SMT |
| Package / Case | TSSOP-16 |
| Packaging | Tube |
| Features | Partial power down (Ioff), Over-voltage tolerant inputs, Power up 3 state, Bias Vcc, Variable outpu |
| Operating Temperature Range | - 40 C to + 85 C |
| Output Type | GTLP |
| Series | SN74GTLP1394 |
| Brand | Texas Instruments |
| Logic Family | GTLP |
| High Level Output Current | - 24 mA |
| Low Level Output Current | 24 mA |
| Operating Supply Current | 20 mA |
| Product Type | Translation - Voltage Levels |
| Factory Pack Quantity | 90 |
| Subcategory | Logic ICs |
| Unit Weight | 0.002183 oz |
For more information, please refer to datasheet
Documents
| SN74GTLP1394PW Datasheet |
More Information
The SN74GTLP1394 is a high-drive, 2-bit, 3-wire bus transceiver that provides LVTTL-to-GTLP and GTLP-to-LVTTL signal-level translation. It allows for transparent and inverted transparent modes of data transfer with separate LVTTL input and LVTTL output pins, which provides a feedback path for control and diagnostics monitoring. The device provides a high-speed interface between cards operating at LVTTL logic levels and a backplane operating at GTLP signal levels, and is especially designed to work with the Texas Instruments 1394 backplane physical-layer controllers. High-speed (about three times faster than standard LVTTL or TTL) backplane operation is a direct result of GTLP reduced output swing (<1 V), reduced input threshold levels, improved differential input, OEC circuitry, and TI-OPC circuitry. Improved GTLP OEC and TI-OPC circuitry minimizes bus-settling time and have been designed and tested using several backplane models. The high drive allows incident-wave switching in heavily loaded backplanes with equivalent load impedance down to 11 .
