Description
SN74HC74MPWREP Texas Instruments - Yeehing Electronics
Enhanced Product Dual D-Type Positive Edge Triggered Flip Flop With Clear And Preset
Pricing (USD)
Quantity | Unit Price |
1 — 99 | 1.603 |
100 — 249 | 1.233 |
250 — 999 | 0.908 |
1,000 + | 0.37 |
The above prices are for reference only.
Specifications
Manufacturer | Texas Instruments |
Product Category | Flip Flops |
RoHS | Y |
Number of Circuits | 2 |
Logic Family | HC |
Logic Type | D-Type Flip-Flop |
Polarity | Inverting/Non-Inverting |
Input Type | CMOS |
Output Type | CMOS |
Propagation Delay Time | 175 ns |
High Level Output Current | - 5.2 mA |
Low Level Output Current | 5.2 mA |
Supply Voltage - Min | 2 V |
Supply Voltage - Max | 6 V |
Minimum Operating Temperature | - 55 C |
Maximum Operating Temperature | + 125 C |
Mounting Style | SMD/SMT |
Package / Case | TSSOP-14 |
Packaging | Reel |
Function | D-Type |
Height | 1.15 mm |
Length | 5 mm |
Operating Temperature Range | - 55 C to + 125 C |
Quiescent Current | 4 uA |
Series | SN74HC74-EP |
Width | 4.4 mm |
Brand | Texas Instruments |
Number of Channels | 2 |
Number of Input Lines | 1 |
Number of Output Lines | 1 |
Operating Supply Voltage | 5 V |
Product Type | Flip Flops |
Reset Type | Set, Reset |
Factory Pack Quantity | 2000 |
Subcategory | Logic ICs |
Part # Aliases | V62/08613-01XE |
Unit Weight | 0.002018 oz |
For more information, please refer to datasheet
Documents
SN74HC74MPWREP Datasheet |
More Information
The SN74HC74 device contains two independent D-type positive edge triggered flip flops. A low level at the preset (PRE) or clear (CLR) inputs sets or resets the outputs, regardless of the levels of the other inputs. When PRE and CLR are inactive (high), data at the data (D) input meeting the setup time requirements are transferred to the outputs on the positive going edge of the clock (CLK) pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of CLK. Following the hold time interval, data at the D input can be changed without affecting the levels at the outputs.