Description
SN74LS107AN Texas Instruments - Yeehing Electronics
Dual J-K Flip-Flops With Clear
Pricing (USD)
Quantity | Unit Price |
1 — 99 | 2.042 |
100 — 249 | 1.789 |
250 — 999 | 1.255 |
1,000 + | 0.81 |
The above prices are for reference only.
Specifications
Manufacturer | Texas Instruments |
Product Category | Flip Flops |
RoHS | Y |
Number of Circuits | 2 |
Logic Family | LS |
Logic Type | J-K Type Flip-Flop |
Polarity | Inverting/Non-Inverting |
Input Type | TTL |
Output Type | TTL |
Propagation Delay Time | 20 ns |
High Level Output Current | - 0.4 mA |
Low Level Output Current | 8 mA |
Supply Voltage - Min | 4.75 V |
Supply Voltage - Max | 5.25 V |
Minimum Operating Temperature | 0 C |
Maximum Operating Temperature | + 70 C |
Mounting Style | Through Hole |
Package / Case | PDIP-14 |
Packaging | Tube |
Function | Direct and Clear Input |
Height | 4.57 mm |
Length | 19.3 mm |
Operating Temperature Range | 0 C to + 70 C |
Series | SN74LS107A |
Width | 6.35 mm |
Brand | Texas Instruments |
Number of Channels | 2 |
Number of Input Lines | 4 |
Number of Output Lines | 2 |
Operating Supply Voltage | 4.75 V to 5.25 V |
Product Type | Flip Flops |
Reset Type | Reset |
Factory Pack Quantity | 25 |
Subcategory | Logic ICs |
Unit Weight | 0.032734 oz |
For more information, please refer to datasheet
Documents
SN74LS107AN Datasheet |
More Information
The '107 contain two independent J-K flip-flops with individual J-K, clock, and direct clear inputs. The '107 is a positive pulse-triggered flip-flop. The J-K input data is loaded into the master while the clock is high and transferred to the slave and the outputs on the high-to-low clock transition. For these devices the J and K inputs must be stable while the clock is high.