SN74LS148D


YeeHing #: Y009-SN74LS148D
Inventory: 6000

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Description

SN74LS148D Texas Instruments - Yeehing Electronics

8-line to 3-line priority encoder

Pricing (USD)

Quantity Unit Price
1 — 99 1.275
100 — 249 1.053
250 — 999 0.756
1,000 + 0.40

The above prices are for reference only.

Specifications

Manufacturer Texas Instruments
Product Category Encoders, Decoders, Multiplexers & Demultiplexers
RoHS Y
Product Selectors / Multiplexers
Logic Family LS
Number of Bits 16 bit
Number of Input Lines 8 Input
Number of Output Lines 3 Output
Propagation Delay Time 19 ns
Supply Voltage - Min 4.75 V
Supply Voltage - Max 5.25 V
Minimum Operating Temperature 0 C
Maximum Operating Temperature + 70 C
Mounting Style SMD/SMT
Package / Case SOP-16
Packaging Reel
Function 8 to 3 Priority
Height 1.58 mm
Input Voltage - 4.75 V to + 5.25 V
Length 9.9 mm
Number of Circuits Quad
Operating Temperature Range 0 C to + 70 C
Output Current 8 mA
Output Voltage 4.75 V to 5.25 V
Series SN74LS148
Width 3.91 mm
Brand Texas Instruments
Logic Type Priority Encoder
High Level Output Current - 0.4 mA
Low Level Output Current 8 mA
Maximum Clock Frequency 35 MHz
Operating Supply Voltage 5 V
Pd - Power Dissipation 190 mW
Product Type Encoders, Decoders, Multiplexers & Demultiplexers
Factory Pack Quantity 2500
Subcategory Logic ICs
Unit Weight 0.004998 oz

For more information, please refer to datasheet

Documents

SN74LS148D Datasheet

More Information

These TTL encoders feature priority decoding of the inputs to ensure that only the highest-order data line is encoded. The '147 and 'LS147 encode nine data lines to four-line (8-4-2-1) BCD. The implied decimal zero condition requires no input condition as zero is encoded when all nine data lines are at a high logic level. The '148 and 'LS148 encode eight data lines to three-line (4-2-1) binary (octal). Cascading circuitry (enable input E1 and enable output E0) has been provided to allow octal expansion without the need for external circuitry. For all types, data inputs and outputs are active at the low logic level. All inputs are buffered to represent one normalized Series 54/74 or 54LS/74LS load, respectively.

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