Description
SN74LVC112APWR Texas Instruments - Yeehing Electronics
Dual Negative-Edge-Triggered J-K Flip-Flop With Clear And Preset
Pricing (USD)
Quantity | Unit Price |
1 — 99 | 0.517 |
100 — 249 | 0.351 |
250 — 999 | 0.271 |
1,000 + | 0.13 |
The above prices are for reference only.
Specifications
Manufacturer | Texas Instruments |
Product Category | Flip Flops |
RoHS | Y |
Number of Circuits | 2 |
Logic Family | LVC |
Logic Type | J-K Type Flip-Flop |
Polarity | Inverting/Non-Inverting |
Input Type | CMOS, TTL |
Output Type | LVTTL |
Propagation Delay Time | 7.1 ns |
High Level Output Current | - 24 mA |
Low Level Output Current | 24 mA |
Supply Voltage - Min | 1.65 V |
Supply Voltage - Max | 3.6 V |
Minimum Operating Temperature | - 40 C |
Maximum Operating Temperature | + 85 C |
Mounting Style | SMD/SMT |
Package / Case | TSSOP-16 |
Packaging | Reel |
Function | Designed for 1.65-V to 3.6-V VCC operation |
Height | 1.15 mm |
Length | 5 mm |
Operating Temperature Range | - 40 C to + 85 C |
Quiescent Current | 10 uA |
Series | SN74LVC112A |
Width | 4.4 mm |
Brand | Texas Instruments |
Number of Channels | 2 |
Number of Input Lines | 3 |
Number of Output Lines | 2 |
Operating Supply Voltage | 1.65 V to 3.6 V |
Product Type | Flip Flops |
Reset Type | Set, Reset |
Factory Pack Quantity | 2000 |
Subcategory | Logic ICs |
Unit Weight | 0.002183 oz |
For more information, please refer to datasheet
Documents
SN74LVC112APWR Datasheet |
More Information
This dual negative-edge-triggered J-K flip-flop is designed for 1.65-V to 3.6-V VCC operation.