SNJ54197J Texas Instruments - Yeehing Electronics

50/30/100-Mhz Presettable Decade OR Binary Counters/Latches

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Specifications

For more information, please refer to datasheet

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More Information

These high-speed monolithic counters consist of four d-c coupled, master-slave flip-flops, which are internally interconnected to provide either a divide-by-two and a divide-by-five counter (’196, ’LS196, ’S196) or a divide-by-two and a divide-by-eight counter (’197, ’LS197, ’S197). These four counters are fully programmable; that is, the outputs may be preset to any state by placing a low on the count/load input and entering the desired data at the data inputs. The outputs will change to agree with the data inputs independent of the state of the clocks.