SNJ54ALS112AJ Texas Instruments - Yeehing Electronics

Dual J-K Negative-Edge-Triggered Flip-Flops With Clear And Preset

Pricing (USD)

Quantity	Unit Price
1 — 99	12.428
100 — 249	10.856
250 — 999	8.37
1,000 +	5.24

The above prices are for reference only.

Specifications

For more information, please refer to datasheet

Documents

SNJ54ALS112AJ Datasheet

More Information

These devices contain two independent J-K negative-edge-triggered flip-flops. A low level at the preset () or clear () inputs sets or resets the outputs, regardless of the levels of the other inputs. When and are inactive (high), data at the J and K inputs meeting the setup-time requirements is transferred to the outputs on the negative-going edge of the clock pulse (CLK). Clock triggering occurs at a voltage level and is not directly related to the fall time of the clock pulse. Following the hold-time interval, data at the J and K inputs may be changed without affecting the levels at the outputs. These versatile flip-flops can perform as toggle flip-flops by tying J and K high.