Description
TLC1550IDW Texas Instruments - Yeehing Electronics
10-Bit, 164 kSPS ADC Parallel Out, Direct I/F to DSP/uProcessor
Pricing (USD)
Quantity | Unit Price |
1 — 99 | 12.326 |
100 — 249 | 10.766 |
250 — 999 | 8.301 |
1,000 + | 5.20 |
The above prices are for reference only.
Specifications
Manufacturer | Texas Instruments |
Product Category | Analog to Digital Converters - ADC |
RoHS | Y |
Series | TLC1550 |
Mounting Style | SMD/SMT |
Package / Case | SOIC-24 |
Resolution | 10 bit |
Number of Channels | 1 Channel |
Sampling Rate | 164 kS/s |
Input Type | Single-Ended |
Interface Type | Parallel |
Architecture | SAR |
Reference Type | External |
Analog Supply Voltage | 4.75 V to 5.5 V |
Digital Supply Voltage | 4.75 V to 5.5 V |
Minimum Operating Temperature | - 40 C |
Maximum Operating Temperature | + 85 C |
Packaging | Reel |
Height | 2.35 mm |
Length | 15.4 mm |
Number of Converters | 1 Converter |
Power Consumption | 10 mW |
Width | 7.52 mm |
Brand | Texas Instruments |
DNL - Differential Nonlinearity | +/- 0.5 LSB |
INL - Integral Nonlinearity | +/- 0.5 LSB |
Operating Supply Voltage | 4.5 V to 5.5 V |
Pd - Power Dissipation | 40 mW |
Product Type | ADCs - Analog to Digital Converters |
Factory Pack Quantity | 2000 |
Subcategory | Data Converter ICs |
Unit Weight | 0.022025 oz |
For more information, please refer to datasheet
Documents
TLC1550IDW Datasheet |
More Information
The TLC1550x and TLC1551 are data acquisition analog-to-digital converters (ADCs) using a 10-bit, switched-capacitor, successive-approximation network. A high-speed, 3-state parallel port directly interfaces to a digital signal processor (DSP) or microprocessor (µP) system data bus. D0 through D9 are the digital output terminals with D0 being the least significant bit (LSB). Separate power terminals for the analog and digital portions minimize noise pickup in the supply leads. Additionally, the digital power is divided into two parts to separate the lower current logic from the higher current bus drivers. An external clock can be applied to CLKIN to override the internal system clock if desired.