TLC2558CDW


YeeHing #: Y004-TLC2558CDW
Inventory: 2000

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Description

TLC2558CDW Texas Instruments - Yeehing Electronics

12-bit, 400 KSPS ADC, 8-Ch. Serial With Powerdown

Pricing (USD)

Quantity Unit Price
1 — 99 11.754
100 — 249 10.267
250 — 999 7.917
1,000 + 5.66

The above prices are for reference only.

Specifications

Manufacturer Texas Instruments
Product Category Analog to Digital Converters - ADC
RoHS Y
Series TLC2558
Mounting Style SMD/SMT
Package / Case SOIC-20
Resolution 12 bit
Number of Channels 8 Channel
Sampling Rate 400 kS/s
Input Type Pseudo-Differential/Single-Ended
Interface Type SPI
Architecture SAR
Reference Type External, Internal
Analog Supply Voltage 4.5 V to 5.5 V
Digital Supply Voltage 4.5 V to 5.5 V
Minimum Operating Temperature - 40 C
Maximum Operating Temperature + 85 C
Packaging Tube
Features Programmable Auto-Channel Sweep
Height 2.35 mm
Length 12.8 mm
Number of Converters 1 Converter
Power Consumption 9 mW
Type Precision ADC
Width 7.52 mm
Brand Texas Instruments
Shutdown No Shutdown
DNL - Differential Nonlinearity 1 LSB
ENOB - Effective Number of Bits 11.6 bit
FPBW - Full Power Bandwidth 1 MHz
INL - Integral Nonlinearity 1 LSB
Operating Supply Voltage 4.5 V to 5.5 V
Product Type ADCs - Analog to Digital Converters
Reference Voltage 5 V
SFDR - Spurious Free Dynamic Range - 84 dB
SINAD - Signal to Noise and Distortion Ratio 71 dB
Factory Pack Quantity 25
Subcategory Data Converter ICs
THD - Total Harmonic Distortion - 82 dB
Unit Weight 0.018953 oz

For more information, please refer to datasheet

Documents

TLC2558CDW Datasheet

More Information

The TLC2558 and TLC2554 are a family of high-performance, 12-bit low power, 1.6 us, CMOS analog-to-digital converters (ADC) which operate from a single 5 V power supply. These devices have three digital inputs and a 3-state output [chip select (CS), serial input-output clock (SCLK), serial data input (SDI), and serial data output (SDO)] that provide a direct 4-wire interface to the serial port of most popular host microprocessors (SPI interface). When interfaced with a DSP, a frame sync (FS) signal is used to indicate the start of a serial data frame.

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